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TAJR106K006HNJ

[Vishay / Dale] 时间:2021-06-12 21:34:29 来源:TopKool Electronics 作者:Ethertronics 点击:134次

The PCA wireless client platform was unveiled last year in Japan. The silicon consists of an XScale application processor and a communication processor that combines XScale with the Micro Signal Architecture (MSA) DSP core that Intel developed with Analog Devices Inc. and introduced in December.

We have no intention to make a profit from the interface itself. We want to make it a common, standard specification used widely,” said Hiroshi Takeda, deputy chief executive of Epson's semiconductor operations division.

The serial Mobile Video Interface will support a maximum data rate of 200 Mbits/second per channel in version 1.0. In version 2.0, to be released in the second quarter of 2005, the maximum data rate will double, to 400 Mbits/s.

TAJR106K006HNJ

The interface defines only the physical layer, leaving customers the freedom to design the upper layers for their desired applications. The interface will provide the interconnect from the application processor to LCD panels, LCD controllers and baseband engines in cameras.

The interface employs low-voltage differential signaling (LVDS), which reduces power consumption and electromagnetic interference, the companies said. It supports both full- and half-duplex operation.

The interface spec covers eight physical signals. When used for mobile phones with a main display and a subdisplay, the interface can control both displays.

TAJR106K006HNJ

In a demonstration, Epson and Renesas showed that six Mobile Video interface lines could replace 49 conventional signal lines.

Epson plans to release bridge chips that comply with version 1.0 of the spec in the fourth quarter. The chips can be used until LCD controllers that support the interface appear in 2005.

TAJR106K006HNJ

Renesas plans to introduce SH-Mobile processors next year that integrate the interface. Driver ICs integrating the interface will be available from both companies in 2005.

To promote the approach, Epson and Renesas intend to organize a special interest group consisting of the two developers, their partners and other users of the interface. SIG members will have access to the interface specifications free of charge.

Equation 4 can be numerically computed via common waveform analysis tools such as Matlab or LabView. This equation proved instrumental in evaluating the external test equipment phase noise contribution to the jitter σT . The job was accomplished by using a phase noise measurement system for avionics tests, operated in phase-lock mode, and fed with the clock source running at sampling rate '2.

The plot in Figure 6 represents the SSCR(ƒn) vs. offset frequency ƒn of the external source as observed at 30 MHz, or the same frequency used in Figure 3.

Figure 6: SSCR vs. ƒn-offset frequency profile of the clock external reference run at 30 MHz, as obtained from a phase noise analyzer.

(责任编辑:Parlex Corp.)

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